NextOp Announces BugScope™ Assertion Synthesis for Progressive, Targeted Verification
Assertion-Based Verification Product Automatically Generates Assertions and
Functional Coverage Properties
NextOp Announces BugScope™ Assertion Synthesis for Progressive, Targeted Verification
Assertion-Based Verification Product Automatically Generates Assertions and
Functional Coverage Properties
SANTA CLARA, Calif., May 6, 2010 -- NextOp Software, Inc. today announced BugScope, the
industry’s first assertion synthesis product to synthesize high quality assertions and functional
coverage properties from the Register Transfer Level (RTL) design and testbench. These
properties enhance existing verification flows by helping design and verification engineers
uncover corner-case bugs, expose functional coverage holes and increase verification
observability.
BugScope automatically generates assertions and functional coverage in IEEE standard formats
such as SVA, PSL or synthesizable Verilog. Design and verification teams can then use
BugScope coverage properties to identify functional coverage holes and guide their test
development; additionally, BugScope’s assertions complement blackbox checkers to catch
corner-case bugs and improve verification observability.
“The fundamental hindrance to assertion-based verification has been the time-consuming task of
creating high quality assertions and functional coverage properties,” said Dr. Yunshan Zhu,
NextOp’s President and CEO. “Design and verification teams can now achieve verification
observability with NextOp’s BugScope assertion synthesis product, mitigating the risk of project
delays and defective silicon.”
Semiconductor Companies Select BugScope
Several leading edge semiconductor chip companies, including Altera, Entropic, and Nvidia,
have already validated NextOp’s BugScope assertion synthesis product and adopted it for
production use.
“NextOp BugScope is an important part of Altera’s robust coverage-driven functional
verification methodology,” said Jeff Fox, principal verification architect at Altera Corporation.
“BugScope allows us to generate numerous high-quality assertions so we can quickly enhance
our tests to reach the highest levels of functional and assertion coverage for our designs.”
“NextOp BugScope automatically generates high quality assertions which capture the functional
constraints in our RTL, and the tool also identifies the coverage holes we need to patch in our
simulation testbench,” said Bill Lind, Director of Engineering at Entropic Communications. “By
utilizing NextOp’s BugScope assertion synthesis product as part of our functional verification
flow, we are able to find corner-case bugs and ensure the success of our projects.”
"Following our rigorous process to ensure that the assertions and coverage properties BugScope
generated were of high quality, Nvidia qualified NextOp's BugScope as part of its functional
verification methodology," stated Dan Smith, Director of Hardware Engineering, Nvidia, "We
look forward to expanding adoption of NextOp across our GPU designs."
Assertion Synthesis Enables Assertion-Based Verification Adoption
As design complexity increases, assertions and coverage properties, which are logic statements
to define the intended behavior of a design, are well-recognized as an important adjunct to the
blackbox checkers used in simulation and formal verification flows. However, adoption of
assertion-based verification has been slow for the following reasons:
- It is infeasible to manually generate an adequate number of assertions to the level needed
for thorough identification of design problems. It is generally desirable to have one
assertion for every 10 to 100 lines of RTL code, yet it can take hours to create, debug and
maintain each assertion.
- It is an unwieldy and time-consuming process to manually create sufficient functional
coverage properties to identify which tests are missing. Coverage properties are a critical
element to prevent defects, yet high quality coverage properties are as tedious and
difficult to write as high quality assertions.
- The high learning curve for standard assertions languages such as SystemVerilog
Assertion (SVA) and Property Specification Language (PSL) is a high barrier to
adoption.
By automating the tedious and time-consuming process of generating assertions and coverage
properties, NextOp BugScope Assertion Synthesis allows design and verification teams to finally
reap the benefits of assertion-based verification in a timely and resource efficient manner.
BugScope Key Features
BugScope has sufficient capacity to support assertion synthesis for full SoC designs, with runtime performance scaling linearly with respect to design complexity.
- BugScope automatically synthesizes high quality assertions to capture key design
constraints and specifications. The assertions offer orthogonal perspective from the RTL
implementation.
- BugScope automatically synthesizes functional coverage properties which expose holes
in the testbench. The coverage properties are functional and are independent of the syntax
of the RTL.
- BugScope uses temporal operators to capture sequential behaviors and to identify issues
among multiple clock cycles.
- Properties are automatically optimized for maximum performance, incurring minimal
overhead to simulation regression.
NextOp’s Approach: Progressive, Targeted Verification
With existing verification approaches alone, it is difficult for verification engineers to determine
whether their designs have been sufficiently tested to be declared functionally correct and ready
for implementation in silicon. NextOp’s BugScope Assertion synthesis adds a mechanism to
measure the progress towards this ‘verification confidence’ over sequential verification cycles.
BugScope is easily incorporated into current digital design and verification flows, according to
the following use model, which is repeated until verification sign-off.
- Engineers use their RTL and testbench information as input to BugScope.
- BugScope automatically outputs properties in standard formats including SVA, PSL, or
Synthesizable Verilog.
- Engineers can review BugScope’s reports to classify the new properties into assertions
and coverage properties, and then bind them to 3rd party simulators, emulators and
formal verification tools in the existing flow.
The properties BugScope initially generates includes a wide mix of both assertions and coverage
properties. The prevalence of new coverage properties provides a measurable indicator that there
are numerous holes that the verification runs have not covered. Correspondingly, the assertions
provide unique ‘white-box’ observability into each block’s targeted behavior, which if triggered
clearly identify design bugs.
As development teams progress through their design and verification iterations, the number of
coverage properties produced by BugScope will decrease relative to the number of assertions,
until such point that there are almost exclusively assertions with only minor coverage properties.
Throughout the iterations, the assertions are bound to the corresponding RTL, making sure that
any modification of the RTL does not introduce new bugs. When an assertion is triggered, it
pinpoints the location of a bug and therefore reduces debug turnaround time.
After the completion of a project, assertions will facilitate future RTL reuse. Because
BugScope’s assertions clearly describe the design intent for each block, the assertion continues
to provide confidence that the design integrity is intact regardless of how that block is used in the
design. Effectively, the complete design spec becomes both the RTL and the full complement of
assertions; any future incorrect usage of the RTL will be caught by the assertions.
BugScope is available on Linux platforms. More information can be found at www.nextopsoftware.com/BugScope-assertion-synthesis.html
NextOp’s whitepaper on assertion-based verification can be found at www.nextopsoftware.com/assertion-synthesis-assertion-based-verification-whitepaper.html
About NextOp
NextOp Software, Inc. is focused on delivering assertion-based verification solutions that allow
design and verification teams to uncover bugs, expose functional coverage holes, and increase
verification observability. NextOp’s BugScope assertion synthesis is the first product to
automatically generate whitebox assertions and functional coverage properties in SVA, PSL and
Verilog formats. BugScope’s properties are used to drive progressive, targeted verification via
robust, executable design specifications for existing simulation, formal and emulation flows. The
company is headquartered at 2900 Gordon Avenue, Suite 100, Santa Clara, CA 95051. For more
information, visit www.nextopsoftware.com or call +1 408-830-9885.
BugScope and NextOp are trademarks of NextOp Software, Inc.
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Media contact:Gloria Nichols
Launch Marketing
gloria@launchm.com
650-560-9002
